This application claims priority under 35 USC § 119 to Korean Patent Application No. 2006-11535, filed on Feb. 7, 2006 in the Korean Intellectual Property Office, the disclosure of which is incorporated herein in its entirety by reference.
1. Field of the Invention
The present invention relates generally to sigma delta modulation, and more particularly to high-order sigma-delta modulation that operates with multiple clock signals having different delays for reduced noise, and a fractional-N phase locked loop (PLL) including the same.
2. Background of the Invention
Generally, a phase-locked loop (PLL) receives a reference frequency signal having a relatively low frequency and generates an output frequency signal having a relatively high frequency. The PLL may be referred to as a frequency synthesizer in the wireless communication field.
A divider is used in the PLL for generating a division frequency signal obtained by frequency division of the output frequency signal. The divider may operate either in an integer-N mode with the frequency being divided by an integer or in a fractional-N mode with the frequency being divided by a sum of an integer and a fraction. The fractional-N mode is more advantageous than the integer-N mode in view of in-band noise, lock time, and/or reference spurious noise.
According to the fractional-N mode, a division ratio is continuously adjusted such that a desired average fractional division ratio is obtained. Particularly, by using a sigma-delta modulator (SDM) in the fractional-N mode, a spurious tone resulting from adjusting the division ratio may be randomized. In addition, the fractional spurious tone may be reduced in an operation band, and noise may be moved to a high frequency out of the operation band based on a noise-shaping characteristic of the SDM. However, the reduction of in-band noise is limited due to nonlinear noise generated from the SDM.
FIG. 1 shows a block diagram of a conventional fractional-N PLL. Referring to FIG. 1, the PLL 10 includes a reference counter (R counter) 11, a phase-frequency detector (PFD) 12, a charge pump (CP) 13, a loop filter 14, a voltage-controlled oscillator (VCO) 15, a division counter (N counter) 16, and an SDM (sigma-delta modulator) 17.
The R counter 11 generates a reference frequency signal Fref from frequency division of a received frequency signal Ftxco. The PFD 12 determines a phase difference between the reference frequency signal Fref and a division frequency signal Fcnt from the N counter 16.
The CP 13 operates based on output signals of the PFD 12 to generate a control signal. The VCO 15 generates an output signal Fpll of the PLL 10 from such a control signal. The N counter 16 performs frequency division on the output signal Fpll by the number N to provide the division frequency signal Fcnt.
The division frequency signal Fcnt is input by the PFD 12, and is also provided to the SDM 17 as a clock signal SDM_CLK. Thus, the PFD 12, the CP 13, and the SDM 17 operate in synchronization with the same clock signal. In the PFD 12 and the CP 13, a considerable amount of high-frequency switching noise may be generated and much digital noise may be generated in the SDM 17. When noises are generated concurrently in many noise sources, noise coupling may amplify such noise.
FIG. 2 is a timing diagram illustrating noise coupling in the PLL of FIG. 1. Referring to FIG. 2, when the PLL 10 is locked, the reference frequency signal Fref and the division frequency signal Fcnt have substantially the same phase. Thus, the PFD 12 and the SDM 17 operate concurrently such that noise PFD/CP_NOISE generated in the PFD 12 and the CP 13 and noise SDM_NOISE generated in the SDM 17 may occur concurrently to be coupled.
The SDM 17 and the CP 13 may be operated at different edges of a clock signal to prevent noise coupling. However, noise of each such component cannot be reduced even if noise coupling is prevented. Also, in case of an application having a PLL, for example a transmitting part of a device adopting code division multiple access (CDMA), performance is seriously degraded by in-band noise around an output frequency band. Therefore, reducing noise in the SDM by preventing noise coupling is desired.